Regviz

NXP Semiconductors /MIMXRT1052 /ENET /TFWR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TFWR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/MIMXRT1052/ENET/TFWR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TFWR_0)TFWR0 (STRFWD_0)STRFWD

TFWR=TFWR_0, STRFWD=STRFWD_0

Description

Transmit FIFO Watermark Register

Fields

TFWR

Transmit FIFO Write

0 (TFWR_0): 64 bytes written.

1 (TFWR_1): 64 bytes written.

2 (TFWR_2): 128 bytes written.

3 (TFWR_3): 192 bytes written.

31 (TFWR_31): 1984 bytes written.
STRFWD

Store And Forward Enable

0 (STRFWD_0): Reset. The transmission start threshold is programmed in TFWR[TFWR].

1 (STRFWD_1): Enabled.

Links

()

Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data